Merge pull request #147 from fwsGonzo/bintr_tc

bintr: Try to re-enter translation immediately
fwsGonzo · Jun 9, 2024 · 4e73bc9 · 4e73bc9
2 parents 387b084 + 2dbd904
commit 4e73bc9
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Showing 4 changed files with 17 additions and 12 deletions.
diff --git a/lib/libriscv/common.hpp b/lib/libriscv/common.hpp
@@ -132,7 +132,6 @@ namespace riscv
 		/// @brief Limits placed on the binary translator.
 		/// @details The binary translator will stop translating after reaching
 		/// either of these limits. The limits are per shared object.
-		unsigned block_size_treshold = 5;
 		unsigned translate_blocks_max = 16'000;
 		unsigned translate_instr_max = 150'000;
 		/// @brief Allow the production of a secondary dependency-free DLL that can be

diff --git a/lib/libriscv/cpu_dispatch.cpp b/lib/libriscv/cpu_dispatch.cpp
@@ -271,14 +271,21 @@ INSTRUCTION(RV32I_BC_SYSTEM, rv32i_system) {
 
 #ifdef RISCV_BINARY_TRANSLATION
 INSTRUCTION(RV32I_BC_TRANSLATOR, translated_function) {
-	VIEW_INSTR();
+retry_translated_function:
 	// Invoke translated code
 	auto bintr_results = 
-		exec->unchecked_mapping_at(instr.whole)(*this, counter.value()-1, counter.max(), pc);
+		exec->unchecked_mapping_at(decoder->instr)(*this, counter.value()-1, counter.max(), pc);
 	pc = REGISTERS().pc;
 	counter.set_counters(bintr_results.counter, bintr_results.max_counter);
-	if (LIKELY(!counter.overflowed() && (pc - current_begin < current_end - current_begin)))
+	if (LIKELY(!counter.overflowed() && (pc - current_begin < current_end - current_begin))) {
+		decoder = &exec_decoder[pc >> DecoderCache<W>::SHIFT];
+		if (decoder->get_bytecode() == RV32I_BC_TRANSLATOR) {
+			pc += decoder->block_bytes();
+			counter.increment_counter(decoder->instruction_count());
+			goto retry_translated_function;
+		}
 		goto continue_segment;
+	}
 	goto check_jump;
 }
 #endif // RISCV_BINARY_TRANSLATION

diff --git a/lib/libriscv/tr_emit.cpp b/lib/libriscv/tr_emit.cpp
@@ -208,12 +208,12 @@ struct Emitter
 				"if (LIKELY(ARENA_READABLE(" + address + ")))",
 					dst + " = " + cast + "*(" + type + "*)&ARENA_AT(cpu, " + speculation_safe(address) + ");",
 				"else {",
-					"const char* " + data + " = api.mem_ld(cpu, PAGENO(" + address + "));",
+					"const char* " + data + " = api.mem_ld(cpu, " + address + ");",
 					dst + " = " + cast + "*(" + type + "*)&" + data + "[PAGEOFF(" + address + ")];",
 				"}");
 		} else {
 			add_code(
-				"const char* " + data + " = api.mem_ld(cpu, PAGENO(" + address + "));",
+				"const char* " + data + " = api.mem_ld(cpu, " + address + ");",
 				dst + " = " + cast + "*(" + type + "*)&" + data + "[PAGEOFF(" + address + ")];"
 			);
 		}
@@ -238,11 +238,11 @@ struct Emitter
 				"if (LIKELY(ARENA_WRITABLE(" + address + ")))",
 				"  *(" + type + "*)&ARENA_AT(cpu, " + speculation_safe(address) + ") = " + value + ";",
 				"else {",
-				"  char *" + data + " = api.mem_st(cpu, PAGENO(" + address + "));",
+				"  char *" + data + " = api.mem_st(cpu, " + address + ");",
 				"  *(" + type + "*)&" + data + "[PAGEOFF(" + address + ")] = " + value + ";",
 				"}");
 		} else {
-			add_code("char* " + data + " = api.mem_st(cpu, PAGENO(" + address + "));");
+			add_code("char* " + data + " = api.mem_st(cpu, " + address + ");");
 			add_code(
 				"*(" + type + "*)&" + data + "[PAGEOFF(" + address + ")] = " + value + ";"
 			);

diff --git a/lib/libriscv/tr_translate.cpp b/lib/libriscv/tr_translate.cpp
@@ -386,8 +386,7 @@ if constexpr (SCAN_FOR_GP) {
 
 		// Process block and add it for emission
 		const size_t length = block_instructions.size();
-		if (length >= options.block_size_treshold
-			&& icounter + length < options.translate_instr_max)
+		if (length > 0 && icounter + length < options.translate_instr_max)
 		{
 			if constexpr (VERBOSE_BLOCKS) {
 				printf("Block found at %#lX -> %#lX. Length: %zu\n", long(block), long(block_end), length);
@@ -611,10 +610,10 @@ bool CPU<W>::initialize_translated_segment(DecodedExecuteSegment<W>&, void* dyli
 	auto func = (void (*)(const CallbackTable<W>&)) ptr;
 	func(CallbackTable<W>{
 		.mem_read = [] (CPU<W>& cpu, address_type<W> addr) -> const void* {
-			return cpu.machine().memory.cached_readable_page(addr << 12, 1).buffer8.data();
+			return cpu.machine().memory.cached_readable_page(addr, 1).buffer8.data();
 		},
 		.mem_write = [] (CPU<W>& cpu, address_type<W> addr) -> void* {
-			return cpu.machine().memory.cached_writable_page(addr << 12).buffer8.data();
+			return cpu.machine().memory.cached_writable_page(addr).buffer8.data();
 		},
 		.vec_load = [] (CPU<W>& cpu, int vd, address_type<W> addr) {
 #ifdef RISCV_EXT_VECTOR