/!\ If you are an Epitech student you should be aware by now that cheating is forbidden. If you are going to copy paste this code, do it at your own risks.
This project is part of the OOP module. The goal of the project is to create a simulation of a logical circuit. It's one of the biggest projects in second year and I was really happy to share this project with Fgib We worked hard and managed to get a good grade on this module considered as hard for the majority of the students.
| Module Name | Grade |
|---|---|
| B4 - Object-Oriented Programming | A |
We managed to complete 86% of the available tests.
details:
Basic components: 4/4
Gate components: 6/6
Advanced components: 6/10
Advanced tests: 4/6
Parsing: 15/15
Rigor: 2/2
The final mark was 18.1 out of 20.
details:
Administrative details (2 / 2) :
Bonus (0 / 0) : power point, 7 segment display (NDLR: available in the bonus branch)
Basic components (1 / 1) :
Gate components (1.5 / 1.5) :
Advanced components (2.1 / 3.5) :
Advanced tests (2 / 3) :
Parsing (1 / 1) :
Component interface (2 / 2) :
Component abstract class (2 / 2) :
Component polymorphism (1 / 1) :
Advanced architecture (1 / 1) :
Exception (1 / 1) :
Template (1 / 1) :
Memory management (0.5 / 1) :
Bad practices (0 / 0) :
If you wish to see my other second year projects just go to my profile :)
Have a great day!