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Z80.c
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Z80.c
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/* Z80 v0.2
______ ______ ______
/\___ \/\ __ \\ __ \
____ \/__/ /\_\ __ \\ \/\ \ ________________________________________________
| /\_____\\_____\\_____\ |
| Zilog \/_____//_____//_____/ CPU Emulator |
| Copyright (C) 1999-2024 Manuel Sainz de Baranda y Goñi. |
| |
| This emulator is free software: you can redistribute it and/or modify it |
| under the terms of the GNU Lesser General Public License as published by |
| the Free Software Foundation, either version 3 of the License, or (at your |
| option) any later version. |
| |
| This emulator is distributed in the hope that it will be useful, but |
| WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public |
| License for more details. |
| |
| You should have received a copy of the GNU Lesser General Public License |
| along with this emulator. If not, see <http://www.gnu.org/licenses/>. |
| |
| -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- |
| |
| A NOTE FROM THE ORIGINAL AUTHOR |
| |
| Those familiar with the official documentation of the Zilog Z80 CPU will |
| find this source code quite intuitive. The purpose has not been to write |
| the fastest possible emulator, although the speed aspect is not neglected, |
| but a portable, hackable and well- |
| .----._.----. structured piece of software; |
| A11 <-01--|1 o|--40-> A10 something small, solid and elegant |
| A12 <-02--| |--39-> A09 that can stand the test of time |
| A13 <-03--| |--38-> A08 with no need for major changes. |
| A14 <-04--| |--37-> A07 |
| A15 <-05--| |--36-> A06 Some of the main design decisions |
| CLK --06->| |--35-> A05 have been the following: |
| D4 <-07->| |--34-> A04 |
| D3 <-08->|.---------.|--33-> A03 1. Opcode partial decoding keeps |
| D5 <-09->|| ZILOG ||--32-> A02 the code small and maintainable. |
| D6 <-10->|| Z80 ||--31-> A01 |
| +5V --11--|| CPU ||--30-> A00 2. Function pointer tables for |
| D2 <-12->|| ||--29-- GND opcode selection allow easy reuse |
| D7 <-13->|'---------'|--28-> RFSH of almost all instruction code |
| D0 <-14->| |--27-> M1 in the interrupt mode 0. |
| D1 <-15->| |<-26-- RESET |
| INT --16->| |<-25-- BUSREQ 3. Avoiding conditional statements |
| NMI --17->| |<-24-- WAIT as much as possible reduces the |
| HALT <-18--| |--23-> BUSACK branch penalty in modern pipelined |
| MREQ <-19--| |--22-> WR processors. |
| IORQ <-20--| |--21-> RD |
| '-----------' |
| Zilog Z80 CPU, May 1976 version |
| 40-pin ceramic DIP pinout Manuel |
| |
'=============================================================================*/
#ifndef Z80_DEPENDENCIES_HEADER
# include <Z/constants/pointer.h>
# include <Z/macros/bitwise.h>
# include <Z/macros/structure.h>
#endif
#ifdef Z80_STATIC
# define Z80_API
#else
# define Z80_API Z_API_EXPORT
#endif
#ifdef Z80_WITH_LOCAL_HEADER
# include "Z80.h"
#else
# include <Z80.h>
#endif
/* MARK: - Types */
typedef zuint8 (* Insn)(Z80 *self);
#ifdef Z80_WITH_FULL_IM0
typedef struct {
Z80* z80;
void* context;
Z80Read fetch;
Z80Read read;
Z80Write write;
Z80Read in;
Z80Write out;
Z80Notify ld_i_a;
Z80Notify ld_r_a;
Z80Notify reti;
Z80Notify retn;
zuint16 pc;
} IM0;
#endif
/* MARK: - Instance Variable and Callback Shortcuts */
#define MEMPTR self->memptr.uint16_value
#define PC self->pc.uint16_value
#define SP self->sp.uint16_value
#define XY self->xy.uint16_value
#define IX self->ix_iy[0].uint16_value
#define IY self->ix_iy[1].uint16_value
#define AF self->af.uint16_value
#define BC self->bc.uint16_value
#define DE self->de.uint16_value
#define HL self->hl.uint16_value
#define AF_ self->af_.uint16_value
#define BC_ self->bc_.uint16_value
#define DE_ self->de_.uint16_value
#define HL_ self->hl_.uint16_value
#define MEMPTRH self->memptr.uint8_values.at_1
#define MEMPTRL self->memptr.uint8_values.at_0
#define PCH self->pc.uint8_values.at_1
#define A self->af.uint8_values.at_1
#define F self->af.uint8_values.at_0
#define B self->bc.uint8_values.at_1
#define C self->bc.uint8_values.at_0
#define E self->de.uint8_values.at_0
#define L self->hl.uint8_values.at_0
#define I self->i
#define R self->r
#define R7 self->r7
#define Q self->q
#define IFF1 self->iff1
#define IFF2 self->iff2
#define IM self->im
#define HALT_LINE self->halt_line
#define INT_LINE self->int_line
#define DATA self->data.uint8_array
#define REQUEST self->request
#define RESUME self->resume
#define OPTIONS self->options
#define CONTEXT self->context
#define FETCH_OPCODE(address) self->fetch_opcode(CONTEXT, address)
#define FETCH(address) self->fetch (CONTEXT, address)
#define READ(address) self->read (CONTEXT, address)
#define WRITE(address, value) self->write (CONTEXT, address, value)
#define IN(port) self->in (CONTEXT, port)
#define OUT(port, value) self->out (CONTEXT, port, value)
#define NOTIFY(callback) if (self->callback != Z_NULL) self->callback(CONTEXT)
/* MARK: - Callbacks: 16-bit Operations */
static Z_ALWAYS_INLINE zuint16 fetch_16(Z80 *self, zuint16 address)
{
zuint8 l = FETCH(address);
return (zuint16)(l | ((zuint16)FETCH(address + 1) << 8));
}
static Z_ALWAYS_INLINE zuint16 read_16(Z80 *self, zuint16 address)
{
zuint8 l = READ(address);
return (zuint16)(l | ((zuint16)READ(address + 1) << 8));
}
static Z_ALWAYS_INLINE void write_16f(Z80 *self, zuint16 address, zuint16 value)
{
WRITE(address, (zuint8)value);
WRITE(address + 1, (zuint8)(value >> 8));
}
static Z_ALWAYS_INLINE void write_16b(Z80 *self, zuint16 address, zuint16 value)
{
WRITE(address + 1, (zuint8)(value >> 8));
WRITE(address, (zuint8)value);
}
#ifndef Z80_WITH_FULL_IM0
static Z_ALWAYS_INLINE zuint16 int_fetch_16(Z80 *self)
{
zuint8 l = self->int_fetch(CONTEXT, PC);
return (zuint16)(l | ((zuint16)self->int_fetch(CONTEXT, PC) << 8));
}
#endif
#define FETCH_16(address) fetch_16 (self, address)
#define READ_16(address) read_16 (self, address)
#define WRITE_16F(address, value) write_16f(self, address, value)
#define WRITE_16B(address, value) write_16b(self, address, value)
/* MARK: - Flags */
/*----------------.
| 7 6 5 4 3 2 1 0 |
| S Z Y H X P N C |
'-|-|-|-|-|-|-|-|-'
| | | | | | | '-- carry / borrow
| | | | | | '---- addition / subtraction
| | | | | '------ parity (P) / two's complement signed overflow (V)
| | | | '-------- result's bit 3 (undocumented)
| | | '---------- half carry / half borrow
| | '------------ result's bit 5 (undocumented)
| '-------------- zero
'---------------- sign */
#define SF 128
#define ZF 64
#define YF 32
#define HF 16
#define XF 8
#define PF 4
#define NF 2
#define CF 1
#define SZPCF (SF | ZF | PF | CF)
#define SZPF (SF | ZF | PF )
#define SZCF (SF | ZF | CF )
#define SYXF (SF | YF | XF )
#define ZPF (ZF | PF )
#define YXCF (YF | XF | CF )
#define YXF (YF | XF )
#define HCF (HF | CF )
#define F_SZPC (F & SZPCF)
#define F_SZP (F & SZPF)
#define F_SZC (F & SZCF)
#define F_C (F & CF)
#define A_SYX (A & SYXF)
#define A_YX (A & YXF)
#define ZF_ZERO(value) (!(value) << 6)
#ifdef Z80_WITH_PARITY_COMPUTATION
static Z_ALWAYS_INLINE zuint8 pf_parity(zuint8 value)
{return (((0x9669U >> ((value ^ (value >> 4)) & 0xF)) & 1) << 2);}
# define PF_PARITY pf_parity
#else
static zuint8 const pf_parity_table[256] = {
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/* 0 */ 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4,
/* 1 */ 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0,
/* 2 */ 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0,
/* 3 */ 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4,
/* 4 */ 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0,
/* 5 */ 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4,
/* 6 */ 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4,
/* 7 */ 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0,
/* 8 */ 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0,
/* 9 */ 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4,
/* A */ 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4,
/* B */ 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0,
/* C */ 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4,
/* D */ 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0,
/* E */ 0, 4, 4, 0, 4, 0, 0, 4, 4, 0, 0, 4, 0, 4, 4, 0,
/* F */ 4, 0, 0, 4, 0, 4, 4, 0, 0, 4, 4, 0, 4, 0, 0, 4};
# define PF_PARITY(value) pf_parity_table[value]
#endif
/*-----------------------------------------------------------------------------.
| `PF_OVERFLOW` computes PF according to whether signed overflow occurs in the |
| addition or subtraction of two integers. For additions, `rhs` must be passed |
| bit-wise ~inverted. For an explanation of the formula, check: |
| * https://stackoverflow.com/a/199668 |
| * http://www.cs.umd.edu/class/spring2003/cmsc311/Notes/Comb/overflow.html |
'=============================================================================*/
#define PF_OVERFLOW(width, result, lhs, rhs) \
(((zuint##width)((lhs ^ rhs) & (lhs ^ result)) >> (width - 3)) & PF)
/*-----------------------------------------------------------------------------.
| Q serves as an abstraction for a set of latches related to flag computation. |
| From an emulation perspective, instructions that affect the flags copy the |
| final value of F to Q, whereas instructions that do not affect the flags |
| (including `ex af,af'`, `pop af`, internal NOPs and interrupt responses) set |
| Q to 0. Q is used to compute YF and XF in the `ccf` and `scf` instructions. |
| |
| References: |
| * https://worldofspectrum.org/forums/discussion/20345 |
| * https://worldofspectrum.org/forums/discussion/41704 |
'=============================================================================*/
#ifdef Z80_WITH_Q
# define FLAGS Q = F
# define Q_0 Q = 0;
#else
# define FLAGS F
# define Q_0
#endif
/* MARK: - Bit Rotation */
#define ROL(value) Z_UINT8_ROTATE_LEFT (value, 1)
#define ROR(value) Z_UINT8_ROTATE_RIGHT(value, 1)
/* MARK: - 8-Bit Register Resolution */
/*---------. .---------------------.
| 76543210 | | J / K | O / P |
|----------| |---------+-----------|
| __jjj___ | | 000 = b | 000 = b |
| _____kkk | | 001 = c | 001 = c |
| __ooo___ | | 010 = d | 010 = d |
| _____ppp | | 011 = e | 011 = e |
'----------' | 100 = h | 100 = XYh |
| 101 = l | 101 = XYl |
| 111 = a | 111 = a |
'--------------------*/
static zusize const j_k_table[8] = {
Z_MEMBER_OFFSET(Z80, bc.uint8_values.at_1),
Z_MEMBER_OFFSET(Z80, bc.uint8_values.at_0),
Z_MEMBER_OFFSET(Z80, de.uint8_values.at_1),
Z_MEMBER_OFFSET(Z80, de.uint8_values.at_0),
Z_MEMBER_OFFSET(Z80, hl.uint8_values.at_1),
Z_MEMBER_OFFSET(Z80, hl.uint8_values.at_0),
0,
Z_MEMBER_OFFSET(Z80, af.uint8_values.at_1)};
static zusize const o_p_table[8] = {
Z_MEMBER_OFFSET(Z80, bc.uint8_values.at_1),
Z_MEMBER_OFFSET(Z80, bc.uint8_values.at_0),
Z_MEMBER_OFFSET(Z80, de.uint8_values.at_1),
Z_MEMBER_OFFSET(Z80, de.uint8_values.at_0),
Z_MEMBER_OFFSET(Z80, xy.uint8_values.at_1),
Z_MEMBER_OFFSET(Z80, xy.uint8_values.at_0),
0,
Z_MEMBER_OFFSET(Z80, af.uint8_values.at_1)};
#define REGISTER_8(table, offset, shift) \
*((zuint8 *)self + table[(DATA[offset] shift) & 7])
#define J0 REGISTER_8(j_k_table, 0, >> 3 )
#define J1 REGISTER_8(j_k_table, 1, >> 3 )
#define K0 REGISTER_8(j_k_table, 0, Z_EMPTY)
#define K1 REGISTER_8(j_k_table, 1, Z_EMPTY)
#define K3 REGISTER_8(j_k_table, 3, Z_EMPTY)
#define O REGISTER_8(o_p_table, 1, >> 3 )
#define P REGISTER_8(o_p_table, 1, Z_EMPTY)
/* MARK: - 16-Bit Register Resolution */
/*---------. .-----------------------------.
| 76543210 | | S | T | W |
|----------| |---------+---------+---------|
| __ss____ | | 00 = bc | 00 = bc | 00 = bc |
| __tt____ | | 01 = de | 01 = de | 01 = de |
| __ww____ | | 10 = hl | 10 = hl | 10 = XY |
'----------' | 11 = sp | 11 = af | 11 = sp |
'----------------------------*/
static zusize const s_table[4] = {
Z_MEMBER_OFFSET(Z80, bc.uint16_value),
Z_MEMBER_OFFSET(Z80, de.uint16_value),
Z_MEMBER_OFFSET(Z80, hl.uint16_value),
Z_MEMBER_OFFSET(Z80, sp.uint16_value)};
static zusize const t_table[4] = {
Z_MEMBER_OFFSET(Z80, bc.uint16_value),
Z_MEMBER_OFFSET(Z80, de.uint16_value),
Z_MEMBER_OFFSET(Z80, hl.uint16_value),
Z_MEMBER_OFFSET(Z80, af.uint16_value)};
static zusize const w_table[4] = {
Z_MEMBER_OFFSET(Z80, bc.uint16_value),
Z_MEMBER_OFFSET(Z80, de.uint16_value),
Z_MEMBER_OFFSET(Z80, xy.uint16_value),
Z_MEMBER_OFFSET(Z80, sp.uint16_value)};
#define REGISTER_16(table, offset) \
*(zuint16 *)(void *)((zchar *)self + table[(DATA[offset] >> 4) & 3])
#define SS0 REGISTER_16(s_table, 0)
#define SS1 REGISTER_16(s_table, 1)
#define TT REGISTER_16(t_table, 0)
#define WW REGISTER_16(w_table, 1)
/* MARK: - Condition Evaluation */
/*---------. .----------.
| 76543210 | | Z |
|----------| |----------|
| __zzz___ | | 000 = nz |
| ___zz___ | | 001 = z |
'----------' | 010 = nc |
| 011 = c |
| 100 = po |
| 101 = pe |
| 110 = p |
| 111 = m |
'---------*/
static zuint8 const z_table[8] = {ZF, ZF, CF, CF, PF, PF, SF, SF};
static Z_ALWAYS_INLINE zsint zzz(Z80 const *self, zuint8 mask)
{
zsint z = (DATA[0] >> 3) & mask;
return !(F & z_table[z]) ^ (z & 1);
}
/* MARK: - 8-Bit Arithmetic and Logical Operations */
/*---------. .---------------------.
| 76543210 | | U SZYHXPNC |
|----------| |---------------------|
| __uuu___ | | 000 = add szycxv0c |
| _____10v | | 001 = adc szycxv0c |
'----------' | 010 = sub szybxv1b |
| 011 = sbc szybxv1b |
| 100 = and szy1xp00 |
| 101 = xor szy0xp00 |
| 110 = or szy0xp00 |
| 111 = cp sz*b*v1b |
|---------------------|
| V SZYHXPNC |
|---------------------|
| 100 = inc szycxv0. |
| 101 = dec szybxv1. |
'--------------------*/
static void uuu(Z80 *self, zuint8 offset, zuint8 rhs)
{
zuint8 t, f;
switch ((DATA[offset] >> 3) & 7)
{
case 0: /* add */
t = A + rhs;
f = ((zuint)A + rhs > 255) | /* CF = carry */
PF_OVERFLOW(8, t, A, ~rhs) | /* PF = overflow */
((A ^ rhs ^ t) & HF); /* HF = half-carry */
/* NF = 0 */
A = t;
break;
case 1: /* adc */
t = A + rhs + (f = F_C);
f = ((zuint)A + rhs + f > 255) | /* CF = carry */
PF_OVERFLOW(8, t, A, ~rhs) | /* PF = overflow */
((A ^ rhs ^ t) & HF); /* HF = half-carry */
/* NF = 0 */
A = t;
break;
case 2: /* sub */
t = A - rhs;
f = (A < rhs) | /* CF = borrow */
NF | /* NF = 1 */
PF_OVERFLOW(8, t, A, rhs) | /* PF = overflow */
((A ^ rhs ^ t) & HF); /* HF = half-borrow */
A = t;
break;
case 3: /* sbc */
t = A - rhs - (f = F_C);
f = ((zsint)A - rhs - f < 0) | /* CF = borrow */
NF | /* NF = 1 */
PF_OVERFLOW(8, t, A, rhs) | /* PF = overflow */
((A ^ rhs ^ t) & HF); /* HF = half-borrow */
A = t;
break;
case 4: /* and */
A &= rhs;
f = HF | PF_PARITY(A); /* HF = 1; PF = parity */
break; /* NF, CF = 0 */
case 5: /* xor */
A ^= rhs;
f = PF_PARITY(A); /* PF = parity */
break; /* HF, NF, CF = 0 */
case 6: /* or */
A |= rhs;
f = PF_PARITY(A); /* PF = parity */
break; /* HF, NF, CF = 0 */
case 7: /* cp */
t = A - rhs;
FLAGS = (zuint8)(
(t & SF) | /* SF = sign */
ZF_ZERO(t) | /* ZF = zero */
((A ^ rhs ^ t) & HF) | /* HF = half-borrow */
PF_OVERFLOW(8, t, A, rhs) | /* PF = overflow */
(A < rhs) | /* CF = borrow */
(rhs & YXF) | /* YF = rhs.5; XF = rhs.3 */
NF); /* NF = 1 */
return;
}
FLAGS = (zuint8)(
f | /* HF, PF, NF and CF already computed */
A_SYX | /* SF = sign; YF = Y; XF = X */
ZF_ZERO(A)); /* ZF = zero */
}
static zuint8 vvv(Z80 *self, zuint8 offset, zuint8 value)
{
zuint8 dec = DATA[offset] & 1;
zuint8 nf = (zuint8)(dec << 1);
zuint8 t = value + 1 - nf;
FLAGS = (zuint8)(
(t & SYXF) | /* SF = sign; YF = Y; XF = X */
ZF_ZERO(t) | /* ZF = zero */
((value ^ t) & HF) | /* HF = half-carry/borrow */
((value == 127 + dec) << 2) | /* PF = overflow */
nf | /* NF = 0 (inc), 1 (dec) */
F_C); /* CF unchanged */
return t;
}
/* MARK: - Rotation and Shift Operations */
/*---------. .-----------.
| 76543210 | | G |
|----------| |-----------|
| __ggg___ | | 000 = rlc |
'----------' | 001 = rrc |
| 010 = rl |
| 011 = rr |
| 100 = sla |
| 101 = sra |
| 110 = sll |
| 111 = srl |
'----------*/
static zuint8 ggg(Z80 *self, zuint8 offset, zuint8 value)
{
zuint8 cf;
switch ((DATA[offset] >> 3) & 7)
{
/* rlc .----------------.
.----. | .---------. |
| CF |<-----| 7 <-- 0 |<--'
'----' '--------*/
case 0:
cf = (value = ROL(value)) & 1;
break;
/* rrc .----------------.
| .---------. | .----.
'-->| 7 --> 0 |----->| CF |
'---------' '---*/
case 1:
cf = value & 1;
value = ROR(value);
break;
/* rl .-------------------------.
| .----. .---------. |
'--| CF |<--| 7 <-- 0 |<--'
'----' '--------*/
case 2:
cf = value >> 7;
value = (zuint8)((value << 1) | F_C);
break;
/* rr .-------------------------.
| .---------. .----. |
'-->| 7 --> 0 |-->| CF |--'
'---------' '---*/
case 3:
cf = value & 1;
value = (zuint8)((value >> 1) | ((zuint8)F_C << 7));
break;
/* sla .----. .---------.
| CF |<--| 7 <-- 0 |<-- 0
'----' '--------*/
case 4:
cf = value >> 7;
value <<= 1;
break;
/* sra .---------. .----.
.-->| 7 --> 0 |-->| CF |
| '-|-------' '----'
'----*/
case 5:
cf = value & 1;
value = (zuint8)((value & 128) | (value >> 1));
break;
/* sll .----. .---------.
| CF |<--| 7 <-- 0 |<-- 1
'----' '--------*/
case 6:
cf = value >> 7;
value = (zuint8)((value << 1) | 1);
break;
/* srl .---------. .----.
0 -->| 7 --> 0 |-->| CF |
'---------' '---*/
case 7:
cf = value & 1;
value >>= 1;
break;
/* Uncoment to avoid compiler warnings */
/*default: cf = 0;*/
}
FLAGS = (zuint8)( /* HF, NF = 0 */
(value & SYXF) | /* SF = sign; YF = Y; XF = X */
ZF_ZERO(value) | /* ZF = zero */
PF_PARITY(value) | /* PF = parity */
cf); /* CF already computed */
return value;
}
/* MARK: - Bit Set and Reset Operations */
/*---------. .---------.
| 76543210 | | M |
|----------| |---------|
| _m______ | | 0 = res |
'----------' | 1 = set |
'--------*/
static Z_ALWAYS_INLINE zuint8 m(Z80 *self, zuint8 offset, zuint8 value)
{
zuint8 t;
Q_0
t = DATA[offset];
return (zuint8)((t & 64)
? value | (1U << ((t >> 3) & 7))
: value & ~(1U << ((t >> 3) & 7)));
}
/* MARK: - Function Shortcuts and Reusable Code */
#define INSN(name) static zuint8 name(Z80 *self)
#define N(offset) ((DATA[offset] >> 3) & 7)
#define Z(mask) zzz(self, mask)
#define U0(value) uuu(self, 0, value)
#define U1(value) uuu(self, 1, value)
#define V0(value) vvv(self, 0, value)
#define V1(value) vvv(self, 1, value)
#define G1(value) ggg(self, 1, value)
#define G3(value) ggg(self, 3, value)
#define M1(value) m (self, 1, value)
#define M3(value) m (self, 3, value)
#define PUSH(value) WRITE_16B(SP -= 2, value)
#define R_ALL ((R & 127) | (R7 & 128))
#define RET MEMPTR = PC = READ_16(SP); SP += 2
#define FETCH_XY_EA(address) MEMPTR = (zuint16)(XY + (zsint8)FETCH(address))
#define IS_XY_PREFIX(opcode) ((opcode) & 0xDF) == 0xDD
#define EX(a, b) t = a; a = b; b = t
#define LD_A_IR(rhs) \
A = rhs; \
\
FLAGS = (zuint8)( /* HF, NF = 0 */ \
A_SYX | /* SF = sign; YF = Y; XF = X */ \
ZF_ZERO(A) | /* ZF = zero */ \
(IFF2 << 2) | /* PF = IFF2 */ \
F_C); /* CF unchanged */ \
\
PC += 2; \
return 9
#define LDX(operator) \
zuint8 t = READ(HL operator); \
\
WRITE(DE operator, t); \
t += A; \
\
FLAGS = (zuint8)( /* HF, NF = 0 */ \
F_SZC | /* SF, ZF, CF unchanged */ \
((t & 2) << 4) | /* YF = (A + [HLi]).1 */ \
(t & XF) | /* XF = (A + [HLi]).3 */ \
(!!(--BC) << 2)); /* PF = !!BCo */ \
\
PC += 2; \
return 16
#define LDXR(operator) \
zuint8 t = READ(HL operator); \
\
WRITE(DE operator, t); \
t += A; \
\
if (--BC) \
{ /* HF, NF = 0 */ \
FLAGS = F_SZC | /* SF, ZF, CF unchanged */ \
((PC >> 8) & YXF) | /* YF = PCi.13; XF = PCi.11 */ \
PF; /* PF = 1 */ \
\
MEMPTR = PC + 1; \
return 21; \
} \
\
FLAGS = (zuint8)( /* HF, PF, NF = 0 */ \
F_SZC | /* SF, ZF, CF unchanged */ \
((t & 2) << 4) | /* YF = (A + [HLi]).1 */ \
(t & XF)); /* XF = (A + [HLi]).3 */ \
\
PC += 2; \
return 16
#define CPX(operator) \
zuint8 n = READ(HL operator); \
zuint8 t0 = A - n; \
zuint8 hf = (A ^ n ^ t0) & HF; \
zuint8 t1 = t0 - (hf >> 4); \
\
FLAGS = (zuint8)( \
(t0 & SF) | /* SF = sign */ \
ZF_ZERO(t0) | /* ZF = zero */ \
hf | /* HF = half-borrow */ \
((t1 & 2) << 4) | /* YF = (A - [HLi] - HFo).1 */ \
(t1 & XF) | /* XF = (A - [HLi] - HFo).3 */ \
(!!(--BC) << 2) | /* PF = !!BCo */ \
NF | /* NF = 1 */ \
F_C); /* CF unchanged */ \
\
MEMPTR operator; \
PC += 2; \
return 16
#define CPXR(operator) \
zuint8 n = READ(HL operator); \
zuint8 t0 = A - n; \
zuint8 hf = (A ^ n ^ t0) & HF; \
zuint8 t1 = t0 - (hf >> 4); \
\
zuint8 f = (zuint8)( \
(t0 & SF) | /* SF = sign */ \
ZF_ZERO(t0) | /* ZF = zero */ \
hf | /* HF = half-borrow */ \
(!!(--BC) << 2) | /* PF = !!BCo */ \
NF | /* NF = 1 */ \
F_C); /* CF unchanged */ \
\
if (t0 && BC) \
{ \
/* YF = PCi.13; XF = PCi.11 */ \
FLAGS = f | ((PC >> 8) & YXF); \
MEMPTR = PC + 1; \
return 21; \
} \
\
FLAGS = (zuint8)( \
f | \
((t1 & 2) << 4) | /* YF = (A - [HLi] - HFo).1 */ \
(t1 & XF)); /* XF = (A - [HLi] - HFo).3 */ \
\
MEMPTR operator; \
PC += 2; \
return 16
#define ADD_16(lhs, rhs, pc_increment) \
zuint16 n = rhs; \
zuint32 t = lhs + n; \
\
FLAGS = (zuint8)( /* NF = 0 */ \
F_SZP | /* SF, ZF, PF unchanged */ \
((t >> 8) & YXF) | /* YF = high-Y; XF = high-X */ \
(((lhs ^ n ^ t) >> 8) & HF) | /* HF = high-half-carry */ \
((t >> 16) & 1)); /* CF = carry */ \
\
MEMPTR = lhs + 1; \
lhs = (zuint16)t; \
pc_increment; \
return 11
#define ADC_SBC_HL_SS(operator, pf_overflow_rhs, or_nf) \
zuint16 ss = SS1; \
zuint32 t = HL operator ss operator F_C; \
\
FLAGS = (zuint8)( \
((t >> 8) & SYXF) /* SF = sign; YF = high-Y; XF = high-X */ \
| (zuint8)ZF_ZERO((zuint16)t) /* ZF = zero */ \
/* HF = high-half-carry (adc), high-half-borrow (sbc) */ \
| (((HL ^ ss ^ t) >> 8) & HF) \
/* PF = overflow */ \
| PF_OVERFLOW(16, t, HL, pf_overflow_rhs) \
| ((t >> 16) & 1) /* CF = carry (adc), borrow (sbc) */ \
or_nf); /* NF = 0 (adc), 1 (sbc) */ \
\
MEMPTR = HL + 1; \
HL = (zuint16)t; \
PC += 2; \
return 15
/* rla .-------------------------. rra .-------------------------.
| .----. .----A----. | | .----A----. .----. |
'--| CF |<--| 7 <-- 0 |<--' '-->| 7 --> 0 |-->| CF |--'
'----' '---------' '---------' '---*/
#define RXA(a_to_cf, operator, fc_to_a) \
zuint8 cf = a_to_cf; \
\
A = (zuint8)((A operator 1) | fc_to_a); \
\
FLAGS = F_SZP | /* SF, ZF, PF unchanged */ \
A_YX | /* YF = Y; XF = X */ \
cf; /* CF = Ai.7 (rla), Ai.0 (rra) */ \
/* HF, NF = 0 */ \
PC++; \
return 4
/* rld .------------------------. rrd .------------------------.
| | | |
.--------|--. .-------------. | .--------V--. .-------------. |
| 7-4 | 3-0 |<--| 7-4 <-- 3-0 |<--' | 7-4 | 3-0 |-->| 7-4 --> 3-0 |---'
'-----A-----' '----(HL)-----' '-----A-----' '----(HL)----*/
#define RXD(vhl_to_vhl, a_to_vhl, vhl_to_a) \
zuint8 t = READ(HL); \
\
MEMPTR = HL + 1; \
WRITE(HL, (zuint8)((t vhl_to_vhl) | (A a_to_vhl))); \
A = (A & 0xF0) | (t vhl_to_a); \
\
FLAGS = (zuint8)( /* HF, NF = 0 */ \
A_SYX | /* SF = sign; YF = Y; XF = X */ \
ZF_ZERO(A) | /* ZF = zero */ \
PF_PARITY(A) | /* PF = parity */ \
F_C); /* CF unchanged */ \
\
PC += 2; \
return 18
#define DJNZ_JR_Z_OFFSET(condition, cycles_if_true, cycles_if_false) \
zsint8 offset; \
\
Q_0 \
offset = (zsint8)FETCH(PC + 1); /* Always read */ \
\
if (condition) \
{ \
MEMPTR = (PC += 2 + offset); \
return cycles_if_true; \
} \
\
PC += 2; \
return cycles_if_false
#define RETX(mnemonic) \
DATA[2] = IFF1; \
NOTIFY(mnemonic); \
Q_0 \
RET; \
if ((IFF1 = IFF2) && INT_LINE) REQUEST |= Z80_REQUEST_INT; \
return 14
#define IN_VC(set_lhs) \
zuint8 t; \
\
MEMPTR = BC + 1; \
t = IN(BC); \
\
FLAGS = (zuint8)( /* HF, NF = 0 */ \
(t & SYXF) | /* SF = sign; YF = Y; XF = X */ \
ZF_ZERO(t) | /* ZF = zero */ \
PF_PARITY(t) | /* PF = parity */ \
F_C); /* CF unchanged */ \
\
set_lhs \
PC += 2; \
return 12
#define INX_OUTX_COMMON(io) \
FLAGS = (zuint8)( \
(B & SYXF) | /* SF = Bo.7; YF = Bo.5; XF = Bo.3 */ \
ZF_ZERO(B) | /* ZF = !Bo */ \
PF_PARITY((t & 7) ^ B) | /* PF = ((T & 7) ^ Bo).parity */ \
((t > 255) ? HCF : 0) | /* HF, CF = T > 255 */ \
((io >> 6) & NF)); /* NF = IO.7 */ \
\
PC += 2; \
return 16
#define INX(hl_operator, memptr_operator) \
zuint8 io = IN(BC); \
zuint t = (zuint)io + (zuint8)(C memptr_operator 1); \
\
WRITE(HL hl_operator, io); \
MEMPTR = BC memptr_operator 1; \
B--; \
INX_OUTX_COMMON(io)
#define OUTX(hl_operator, memptr_operator) \
zuint8 io = READ(HL hl_operator); \
zuint t = (zuint)io + L; \
\
B--; \
MEMPTR = BC memptr_operator 1; \
OUT(BC, io); \
INX_OUTX_COMMON(io)
/*-----------------------------------------------------------------------------.
| Block instructions produce an extra M-cycle of 5 T-states to decrement PC if |
| the loop condition is met. In 2018, David Banks (AKA hoglet) discovered that |
| the Z80 CPU performs additional flag changes during this M-cycle and managed |
| to decipher the behaviors. All block instructions copy bits 13 and 11 of PCi |
| to YF and XF, respectively [1.1], but `inir`, `indr`, `otir` and `otdr` also |
| modify HF and PF in a very complicated way [1.2]. These latter two flags are |
| not commented here because the explanation would not be simpler than the |
| code itself, so please refer to David Banks' paper [2] for more information. |
| |
| David Banks' discoveries have been corroborated thanks to Peter Helcmanovsky |
| (AKA Ped7g), who wrote a test that covers most of the cases that can be |
| verified on a ZX Spectrum [3]. |
| |
| In 2022, rofl0r discovered that the instructions `otir` and `otdr` also set |
| MEMPTR to `PCi + 1` during the extra M-cycle [4]. However, this information |
| was not announced anywhere and went unnoticed by the emulation community |
| until 2023, when Manuel Sainz de Baranda y Goñi rediscovered the same |
| behaviour in all four I/O block instructions: `inir`, `indr`, `otir` and |
| `otdr` [5]. |
| |
| References: |
| 1. https://stardot.org.uk/forums/viewtopic.php?t=15464 |
| 1. https://stardot.org.uk/forums/viewtopic.php?p=211042#p211042 |
| 2. https://stardot.org.uk/forums/viewtopic.php?p=212021#p212021 |
| 2. Banks, David (2018-08-21). "Undocumented Z80 Flags" rev. 1.0. |
| * https://github.com/hoglet67/Z80Decoder/wiki/Undocumented-Flags |
| * https://stardot.org.uk/forums/download/file.php?id=39831 |
| 3. Helcmanovsky, Peter (2021/2022). "Z80 Block Flags Test". |
| * https://github.com/MrKWatkins/ZXSpectrumNextTests |
| 4. https://github.com/hoglet67/Z80Decoder/issues/2 |
| 5. https://spectrumcomputing.co.uk/forums/viewtopic.php?t=10555 |
'=============================================================================*/
#define INXR_OTXR_COMMON \
if (B) { \
FLAGS = (zuint8)( /* ZF = 0 */ \
(B & SF) | /* SF = Bo.7 */ \
(PCH & YXF) | /* YF = PCi.13; XF = PCi.11 */ \
nf | /* NF = IO.7 */ \
(hcf ? /* CF = T > 255 */ \
CF | \
(nf ? \
(!(B & 0xF) << 4) | \
PF_PARITY(p ^ ((B - 1) & 7)) \
: \
(((B & 0xF) == 0xF) << 4) | \
PF_PARITY(p ^ ((B + 1) & 7))) \
: PF_PARITY(p ^ (B & 7)))); \
\
MEMPTR = PC + 1; \
return 21; \
} \
\
FLAGS = ZF | /* ZF = 1; SF, YF, XF = 0 */ \
hcf | /* HF, CF = T > 255 */ \
PF_PARITY(p) | /* PF = ((T & 7) ^ Bo).parity */ \
nf /* NF = IO.7 */
#define INXR(hl_operator, memptr_operator) \
zuint8 io = IN(BC); \
zuint8 nf = (io >> 6) & NF; \
zuint t; \