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@KULeuven-MICAS

MICAS (KU Leuven)

We initiate, drive and realize breakthroughs in micro and nano-electronic systems, for a better and more comfortable life for everyone.

This is the GitHub organization for the MICAS research group at KU Leuven. Here you can find open-source projects made by us and our collaborators.

SNAX Framework

Snax is an end-to-end, open-source multi-accelerator cluster design framework. It consists of the snax-mlir compile toolchain and the snax cluster hardware framework.

snax-mlir Repo

snax cluster Repo

Fast DNN Accelerator Design Space Exploration Frameworks

ZigZag targets rapid DSE for DNN accelerator platforms supporting an broad set of hardware architectures and workload scheduling scenarios beyond other existing frameworks.
The latest version of ZigZag includes support for modeling of analog and digital in-memory computing accelerators and estimating both peak/workload performance at the macro and system level.

Stream is an extension of ZigZag capable of modeling multi-core DNN acceleration employing fine-grained layer-fused processing.

DeFiNes Repo

DeFiNes extends ZigZag to enable the DSE of cross-layer depth-first scheduling (a.k.a. layer fusion, or cascaded execution)

Accelerator-aware Neural Network Deployment

HTVM Repo

HTVM is a neural network compiler based on Dory and TVM that allows for efficient neural network deployment on heterogenous TinyML platforms with scratchpad-memory accelerators.

Artificial Intelligence System on Chips (SoCs)

TinyVers Repo

V. Jain, S. Giraldo, J. D. Roose, L. Mei, B. Boons and M. Verhelst, "TinyVers: A Tiny Versatile System-on-Chip With State-Retentive eMRAM for ML Inference at the Extreme Edge," in IEEE Journal of Solid-State Circuits, doi: 10.1109/JSSC.2023.3236566.

V. Jain, S. Giraldo, J. D. Roose, B. Boons, L. Mei and M. Verhelst, "TinyVers: A 0.8-17 TOPS/W, 1.7 μW-20 mW, Tiny Versatile System-on-chip with State-Retentive eMRAM for Machine Learning Inference at the Extreme Edge," 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Honolulu, HI, USA, 2022, pp. 20-21, doi: 10.1109/VLSITechnologyandCir46769.2022.9830409.

K. Ueyoshi et al., "DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC," 2022 IEEE International Solid- State Circuits Conference (ISSCC), San Francisco, CA, USA, 2022, pp. 1-3, doi: 10.1109/ISSCC42614.2022.9731716.

P. Houshmand et al., "DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge," in IEEE Journal of Solid-State Circuits, vol. 58, no. 1, pp. 203-215, Jan. 2023, doi: 10.1109/JSSC.2022.3214064.

DPU Repo

N. Shah, L. I. G. Olascoaga, S. Zhao, W. Meert and M. Verhelst, "DPU: DAG Processing Unit for Irregular Graphs With Precision-Scalable Posit Arithmetic in 28 nm," in IEEE Journal of Solid-State Circuits, vol. 57, no. 8, pp. 2586-2596, Aug. 2022, doi: 10.1109/JSSC.2021.3134897.

DPU-v2 Repo

NN. Shah, W. Meert and M. Verhelst, "DPU-v2: Energy-efficient execution of irregular directed acyclic graphs," 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), Chicago, IL, USA, 2022, pp. 1288-1307, doi: 10.1109/MICRO56248.2022.00090.



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  1. zigzag zigzag Public

    HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators

    C++ 90 31

  2. stream stream Public

    Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.

    Python 29 16

  3. htvm htvm Public

    Efficient Neural Network Deployment on Heterogenous TinyML Platforms

    Python 13

  4. snax_cluster snax_cluster Public

    Forked from pulp-platform/snitch_cluster

    A heterogeneous accelerator-centric compute cluster

    SystemVerilog 8 4

  5. snax-mlir snax-mlir Public

    Driving Snax with MLIR

    Python 7 3

Repositories

Showing 10 of 26 repositories
  • snax_cluster Public Forked from pulp-platform/snitch_cluster

    A heterogeneous accelerator-centric compute cluster

    KULeuven-MICAS/snax_cluster’s past year of commit activity
    SystemVerilog 8 Apache-2.0 39 17 (3 issues need help) 7 Updated Jul 7, 2024
  • KULeuven-MICAS/hypercorex’s past year of commit activity
    Python 0 Apache-2.0 0 0 0 Updated Jul 6, 2024
  • snax-mlir Public

    Driving Snax with MLIR

    KULeuven-MICAS/snax-mlir’s past year of commit activity
    Python 7 3 3 4 Updated Jul 5, 2024
  • stream Public

    Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.

    KULeuven-MICAS/stream’s past year of commit activity
    Python 29 MIT 16 0 5 Updated Jul 3, 2024
  • KULeuven-MICAS/snax-gemm’s past year of commit activity
    Scala 6 1 5 0 Updated Jul 1, 2024
  • zigzag Public

    HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators

    KULeuven-MICAS/zigzag’s past year of commit activity
    C++ 90 MIT 31 2 3 Updated Jun 26, 2024
  • .github Public

    README for MICAS public organization profile

    KULeuven-MICAS/.github’s past year of commit activity
    0 MIT 0 0 0 Updated Jun 26, 2024
  • occamy Public Forked from pulp-platform/occamy

    A high-efficiency system-on-chip for floating-point compute workloads.

    KULeuven-MICAS/occamy’s past year of commit activity
    Tcl 0 Apache-2.0 8 0 0 Updated Jun 25, 2024
  • snax-dev Public

    Main repo for the HW development of SNAX.

    KULeuven-MICAS/snax-dev’s past year of commit activity
    Python 1 2 5 3 Updated Jun 18, 2024
  • zigzag-imc Public

    HW accelerator mapping optimization framework for in-memory computing

    KULeuven-MICAS/zigzag-imc’s past year of commit activity
    C++ 15 BSD-3-Clause 2 0 0 Updated Jun 11, 2024

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