Ten_Bit_Multiplier

Designed 10 bit multiplier, implemented using structural and RTL level design, and the functionality of 10 bit adder is completely synchronous.

Name		Name	Last commit message	Last commit date
Latest commit History 3 Commits
10bit_adder.vhd		10bit_adder.vhd
Multiplicand_register.vhd		Multiplicand_register.vhd
README.md		README.md
VLSI_ten_ bit multiplier.pptx		VLSI_ten_ bit multiplier.pptx
controller.vhd		controller.vhd
multiplier.vhd		multiplier.vhd
multiplier_result.vhd		multiplier_result.vhd

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