Nexys-4-Projects

Mini projects based on Xilinx Nexys 4 DDR with Verilog on Xilinx Vivado

Name		Name	Last commit message	Last commit date
Latest commit History 5 Commits
bcd_counter/srcs		bcd_counter/srcs
char_shift/srcs		char_shift/srcs
dds+freq_meter/srcs/sources_1/ip/square_gen		dds+freq_meter/srcs/sources_1/ip/square_gen
dds		dds
digital_clock/srcs		digital_clock/srcs
freq_meter/srcs		freq_meter/srcs
pwm/srcs		pwm/srcs
timer/srcs		timer/srcs
vga_pic		vga_pic
vga_strip/srcs		vga_strip/srcs
README.md		README.md

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