nexys4ddr
Here are 33 public repositories matching this topic...
Xilinx Vivado demo project with design, IP, SDK interaction, VGA, finite state machine and outputs
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Aug 30, 2017 - VHDL
A helicopter game written for the Nexys 4 DDR Board in VHDL
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Dec 13, 2017 - VHDL
Game of Balance is an accelerometer based maze navigation game, with added features of score and life, that is built on Nexys 4 DDR development board.
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Jan 27, 2018 - VHDL
4bit_CLA_Adder_7seg in Xilinx Vivado Verilog
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Mar 6, 2018 - HTML
A platformer game coded in Verilog for the Nexys 4 DDR Artix-7 FPGA.
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Oct 22, 2018 - Verilog
A finite state machine controlled calculator written using Verilog in Xilinx Vivado targeting the Nexys 4 DDR FPGA Board
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Dec 9, 2018 - Verilog
It is my Final Degree Project of Grado de Tecnologías y Servicios de Telecomunicación in Universidad Politécnica de Madrid
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Jan 24, 2019 - VHDL
Using the FPGA board Nexys Artix-7 to design a breakout game with vhdl language.
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May 27, 2019 - VHDL
Implemented an ultrasonic sensor to measure and visualize distances on the FPGA 7-seg Display and LEDs.
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Dec 5, 2019 - VHDL
Usese the zybo and nexys 4 ddr to play a game of breakout.
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Aug 13, 2020 - VHDL
My experiments with Nexys4 DDR Artix-7 FPGA Board
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Oct 1, 2020 - Verilog
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